To perform interleave and de-interleave processings for each bit by simple circuit constitution to high-speed sampling 1-bit digital audio.

Serial input digital data DI are turned to 1-byte parallel data PD1 in an S/P conversion circuit 4, written to a buffer storage circuit 5 by the block unit of a prescribed bit number by address signals R/W.AD from an address generation circuit 7 and repeatedly read by the address signals R/W.AD of a reverse order for which the high order and low order of the bit array of the address signals R/W.AD are inverted and the bit of the order specified by selection address signals BS.AD from the address generation circuit 7 is selected for each byte in a bit selection circuit 6. Thus, output digital data DO for which the input digital data DI are interleaved by a bit unit are obtained. This de-interleave device is similar and the digital data of the original bit array are obtained.