PURPOSE: To extract selectively the intermediate-level component in the input signal, by using two units of the MOS inverter having the different β ratios and then giving a common connection to the input ends of these inverters to secure a differential process for the two outputs.

CONSTITUTION: The MOS inverters I1 and I2 having different β ratios are used, and a common connection is secured between the input ends of both inverters. At the same time, the E type MOS transistor Q31 functioning as the transfer gate and the D type MOS transistor Q32 functioning as the capacitor are connected in series to each other between the output ends, and also the E type MOS transistor Q33 is connected in parallel to the driver MOS transistor Q22 of the inverter I2. Then the Q31 and Q32 are driven by the clocks and ' respectively, and as a result the differential of the output voltage between the inverters I1 and I2 is accumulated to the Q32. This differential voltage is extracted via the E/DMOS inverter I3 comprising the D type load MOS transistor Q34, the E type driver MOS transistor Q35 and the E type MOS transistor Q36 each.