Title:
INTERRUPT CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPH0764804
Kind Code:
A
Abstract:
PURPOSE: To provide an interrupt control circuit which reduces the number of signal lines to raise the mounting density by giving plural meanings to one signal line to multiplex them.
CONSTITUTION: Interrupt output means 1, 2, 3, and 4 which output plural interrupt signals onto the same interrupt signal line 13 on a bus in accordance with prescribed timings, a taking-in timing generating means 5 which generates timings for taking-in of plural interrupt signals on the interrupt signal line 13, and plural latch means 7 which separate, take in, and store plural interrupt signals on the interrupt signal line 13 in accordance with timings generated by the taking-in timing generating means 5 are provided.
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Inventors:
ISHIMATSU AKIRA
IWASAKI KENJI
IWASAKI KENJI
Application Number:
JP21061993A
Publication Date:
March 10, 1995
Filing Date:
August 25, 1993
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G06F9/48; G06F9/46; G06F13/24; (IPC1-7): G06F9/46; G06F13/24
Attorney, Agent or Firm:
Toshiaki Suzuki
Next Patent: REAL-TIME MULTITASK SYSTEM