Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
INTERRUPTION PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPS578855
Kind Code:
A
Abstract:

PURPOSE: To prevent an increase in load on a program even if the number of channels increases, by determining the entry address of a processing program on the basis of a set value outputted from an interruption control part.

CONSTITUTION: An encoding circuit 4, when one of interruption signals Ii0WIi7 is made effective, selects one with top priority and encodes the selected signal to output three bits EA0WEA2. Simultaneously, the circuit 4 inputs an interruption information signal Ii to an interruption control circuit 3. An address sent from the circuit 3 is the same. At this time, the outputs EA0WEA2 of the circuit 4 are inserted into part of a data bus 6, so microcomputer 1 is capable of implementing a branch to the entry bus for a processing program which corresponds to an interruption corresponding to each circuit.


Inventors:
GOUHARA MASAO
NAKAMURA TAKASHI
Application Number:
JP8239980A
Publication Date:
January 18, 1982
Filing Date:
June 18, 1980
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
International Classes:
G06F13/24; G06F9/48; (IPC1-7): G06F3/00; G06F9/46