Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
INVERTER CIRCUIT
Document Type and Number:
Japanese Patent JP2004153577
Kind Code:
A
Abstract:

To provide an inverter circuit employing an n-type MOS transistor capable of obtaining a supply voltage as a high-level output even on the occurrence of a short channel phenomenon.

An inverter circuit 10 includes transistors T31, T32, T33, and a bootstrap capacitor C35. As to the transistor T31, the drain is connected to the power supply, and the source is connected to the output terminal. As to the transistor T32, the drain is connected to the output nodal point, the source is grounded, and the gate is connected to the input terminal. As to the bootstrap capacitor C35, one electrode is connected to the source of the transistor T33, while the other electrode is connected to the output terminal. Further, as to the transistor T33, the drain is connected to the power supply, the source is connected to the gate of the load MOS transistor, and the gate is connected to the input nodal point.


Inventors:
KASUGA SHIGETAKA
YAMAGUCHI TAKUMI
Application Number:
JP2002316748A
Publication Date:
May 27, 2004
Filing Date:
October 30, 2002
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K19/0944; (IPC1-7): H03K19/0944
Attorney, Agent or Firm:
Shiro Nakajima