Title:
INVERTER DEVICE
Document Type and Number:
Japanese Patent JPS60121964
Kind Code:
A
Abstract:
PURPOSE:To enhance the efficiency of the entire inverter device by stopping the generation of an ON gate signal for a GTO until the ON period of a feedback diode is finished, thereby suppressing the supply of the ON gate signal to the necessary minimum period. CONSTITUTION:A load current is detected by a current detector 6, and the detection signal is inputted to a discriminator 7. This discriminator 7 outputs a polarity discrimination signal which becomes a level 1 during the period that the AC output of the inverter is positive and a level 0 during the negative period. This signal is inputted through a NOT circuit 8 to an AND circuit 9X, and inputted directly to an AND circuit 9. ON command signals are inputted to the AND circuits 9X, 9U, and the outputs are applied to gate circuit 5X, 5U of the GTO1X, 1U.
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Inventors:
YUYA TAKASHI
ASAEDA TAKEAKI
ASAEDA TAKEAKI
Application Number:
JP22881883A
Publication Date:
June 29, 1985
Filing Date:
December 01, 1983
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H02M7/48; (IPC1-7): H02M7/48
Attorney, Agent or Firm:
Masuo Oiwa