JOSEPHSON DATA STORAGE CIRCUIT AND DATA SERIAL/PARALLEL CONVERTING CIRCUIT USING IT

Title:

JOSEPHSON DATA STORAGE CIRCUIT AND DATA SERIAL/PARALLEL CONVERTING CIRCUIT USING IT

Document Type and Number:

Japanese Patent JPS6064528

Kind Code:

A

Abstract:

PURPOSE: To obtain a data storage circuit with ease of control by connecting the 1st control line of each Josephson element of four Josephson switches as specified and connecting the 2nd control line in series therewith so as to apply a timing signal.

CONSTITUTION: The Josephson junction element of the 1st Josephson switch G1 and the 1st control line of the 3rd Josephson switch G3 are connected via inductors L1, L2 and the 2nd switch G2 and the 1st control line of the 4th switch G4 are connected in series similarly. The 3rd Josephson junction element and the 1st current output line M1 are connected in series and the 4th Josephson junction element and the 2nd data current output line are connected in series. A complementary data pulse is applied to the 2nd control line of the 1st and 4th switches and the 2nd control line of the 2nd and 3rd switches.

Inventors:

YAMAUCHI YOSHINORI
AOKI KATSUHIKO
YOSHIKIYO HARUO

Application Number:

JP17272983A

Publication Date:

April 13, 1985

Filing Date:

September 19, 1983

Export Citation:

Click for automatic bibliography generation Help

Assignee:

NIPPON TELEGRAPH & TELEPHONE

International Classes:

H03M9/00; G11C11/44; H03K3/38; (IPC1-7): G11C11/44; H03M9/00

Attorney, Agent or Firm:

Shoji Tanaka

Previous Patent: Image forming device

Next Patent: CIRCUIT FOR DECODING BCH SINGLE ERROR CORRECTION AND DOUBLE ERROR DETECTION CODE