LAMINATED CERAMIC CAPACITOR AND ITS MANUFACTURE

Japanese Patent JP3363236

B2

PURPOSE: To obtain a small-sized large-capacitance capacitor which is free from delamination and cracks and has excellent electrical and mechanical characteristics by providing a cavity in an intermediate layer area at a distance longer than a specific value from each capacitance generating area.
CONSTITUTION: An intermediate layer area F in which only dielectric porcelain layers 5 are laminated is formed between two capacitance generating areas D and E constituted by alternately laminating dielectric porcelain layers 5 and internal electrodes 6. A cavity 8 is formed at distances G of ≥50μm from the internal electrodes 6 in the upper and lower capacitance generating areas D and E in the intermediate layer area F. Since stresses generated at the baking time are concentrated to the cavity G in the area F, no delamination occurs between the porcelain layers 5 and internal electrodes 6, between the layers 5, or between the capacitance generating areas D and E and intermediate layer area F or cracking of the dielectric porcelain does not occur. Therefore, a small-sized large-capacitance capacitor having excellent electrical and mechanical characteristics can be obtained.

Seiichi Koizumi

JP2985794A

January 08, 2003

February 28, 1994

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Kyocera Corporation

H01G4/12; (IPC1-7): H01G4/12

JP6216142A
JP5640227A

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