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Title:
LAMINATED SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5890769
Kind Code:
A
Abstract:

PURPOSE: To allow the titled device to be obtained with low cost and high reliability, by forming a structure wherein neither a hollow part nor the upper layer of some layer is formed partially.

CONSTITUTION: An IC22 is formed on a substrate Si 21. Particularly, the part of the circuit 22 has high generation of heat and is contrived for the efficiency of heat radiation without forming a semiconductor layer in the upper layer. The second layer 23, third layer 24 and forth layer 25 are respectively IC, only the fifth layer 26 is assembled by a phase-down bonding, and therefore the layer 26 is formed also in the upper part. When a wiring is performed after the semiconductor layer of the layer 23 is so formed as not to form the layer 23 in the upper part of a part of the layer 22, the conduction between the layers 22 and 23 can be securely performed without using a special technique such as a through hole. When forming the layer 23, a method wherein a laser or electron rays are irradiated resulting in the improvement of crystallinity of the semiconductor layer of the layer 23 with the crystal region of the aperture part on the layer 22 can be adopted.


Inventors:
NISHIMURA TADASHI
AKASAKA YOUICHI
Application Number:
JP19111881A
Publication Date:
May 30, 1983
Filing Date:
November 25, 1981
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/00; H01L25/065; H01L27/14; (IPC1-7): H01L27/12; H01L27/14
Domestic Patent References:
JPS55162224A1980-12-17
JPS5667923A1981-06-08
Attorney, Agent or Firm:
Masuo Oiwa



 
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