To provide a land display method for multilayer printed circuit board for printed circuit board CAD capable of sufficiently dealing with improvement in the density of a printed circuit board without danger to generate excessive empty areas on the printed circuit board.

Before arranging wiring 66, lands 64, 65 and 67 are not displayed but only holes 32-35 are displayed and by setting wiring 66, the lands 64 and 65 are automatically displayed at the positions of the holes 34 and 35. Further, when wiring 69 is set, the land 67 is displayed at the position of the hole 33. In the case of setting wiring 69, the existence of the land at the position of the hole 32 is ignored and processed as an interval between the outer periphery of the hole and wiring.