Title:
LARGE-SCALE INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS59145542
Kind Code:
A
Abstract:
PURPOSE:To enable to freely select connection wirings according to the number of pins and arrangement of a package by a method wherein the input-output circuit part of unit form, an input-output electrode pad part and a wiring part for connection are arranged regularly in large numbers on the circumference of an LSI chip. CONSTITUTION:A number of input-output electrode pad parts 2 are arranged at the outermost part of the LSI chip, and then a region 3 for connecting wiring is provided inside said electrode pad parts 2, and it is used as a wiring part for connection. A number of input-output circuit parts 1 are arranged inside the wiring part 3 for connection. The input-output circuit part 1 is to be designed in such a manner that the circuit is composed of an input circuit and an output circuit or an input-output combination circuit so that it can be coped with the desired internal circuit of the LSI. The input-output circuit part 1 and the input- output electrode pad part 2 are connected by a universal wiring group part 3 for connection.
Inventors:
KENGAKU SETSUYA
CHIMURA MORIYUKI
CHIMURA MORIYUKI
Application Number:
JP2003683A
Publication Date:
August 21, 1984
Filing Date:
February 09, 1983
Export Citation:
Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L27/04; H01L21/82; H01L21/822; H01L27/118; (IPC1-7): H01L27/04
Domestic Patent References:
| JPS5378185A | 1978-07-11 |
Attorney, Agent or Firm:
Akira Kobiji (2 outside)