PURPOSE: To improve the performance for general-purpose application of the titled circuit by counting a pulse, generating an address, reading it from a memory and sending a timing pulse externally so as to rewrite the memory content if a frame format is revised thereby coping the titled circuit with the said revision.

CONSTITUTION: The titled circuit consists of a counter 7 outputting a pulse corresponding to inputted data setting information, an address generation means 14, a storage means 15 outputting timing pulse generation information, a data storage means 16, a gate means 17 generating a timing pulse. In revising a frame format, revised timing pulse generating information is read corresponding to the address from the address generating means 14 by rewriting the timing pulse generating information written in the storage means 15, the information is ANDed with the output of the counter 7 by the gate means 17 via the data storage means 16 to obtain a required timing pulse. Thus, the general-purpose application of this circuit is enhanced.