PURPOSE: To enable a dot density to be output to be changed easily by providing a reference clock signal generating means, a reference clock frequency dividing means and a divided frequency count designating means and varying a photosensitive drum rotation speed through designation of a divided frequency count in compliance with an output dot count.

CONSTITUTION: A 4MHz clock signal oscillated by a crystal oscillation circuit 81 is output to a counter 82, and the clock signal is counted down to (1/1,000). An output clock signal fo from a preset counter 83 which is counted down to '1/N' in accordance with data 'N' to be set by a latching circuit 84 is a reference signal to a PLL circuit 85. In addition, any value of '1'W'256' to be sent from PCPU 66 is set to the latching circuit 84, and the preset counter selects the count-down value (1/N) according to a value to be set by the latching circuit. The PLL circuit 85 controls the rotation of a drum motor so that a signal fo to be obtained by a rotational pulse signal generator 87 which generates pulses at a rate of one pulse/rotation following the rotation of a photosensitive drum motor 56 may equal a reference frequency fo.