Title:
LEAD FRAME PACKAGE FOR ELECTRONIC ELEMENT
Document Type and Number:
Japanese Patent JP2537014
Kind Code:
B2
Abstract:
PURPOSE: To provide a new and improved electronic element packaging constitution for packaging an integrated circuit chip and a conductive coated dielectric substrate or the like.
CONSTITUTION: An electronic element 30 is provided with a contact at one side edge. A lead frame 32 is provided with a lead 36 extended under an electronic element, and a lead 10 extends from the outside to the inside. A wire wire-bonds an electronic element contact 44 and lead terminals 12 and 40. Two electronic elements are laminated so as to be shifted from each other, and the contact is exposed on the surface at one side edge of each electronic element, so that a stepwise surface on which the plural electronic element contacts are exposed can be formed. The several leads of the lead frame in a multiple density memory are continuously extended under the layered product, and a signal is inputted through a bit, address, control, power source, and ground input to the electronic element. These inputs are common between the adjacent chips. The wire connects the contact on each chip with a common lead.
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Inventors:
TOMASU MARIO SAIHOORA
HOORU UIRIAMU KOTEUSU
HOORU UIRIAMU KOTEUSU
Application Number:
JP24662493A
Publication Date:
September 25, 1996
Filing Date:
October 01, 1993
Export Citation:
Assignee:
INTAANASHONARU BIJINESU MASHIINZU CORP
International Classes:
H01L21/60; H01L23/495; H01L23/50; H01L25/065; H01L25/07; H01L25/18; (IPC1-7): H01L23/50; H01L21/60; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP29157A | ||||
| JP1235363A |
Attorney, Agent or Firm:
Kiyoshi Goda (2 outside)