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Patent Searching and Data


Title:
LINE FOR FORMING SOLDER LAYER TO CIRCUIT BOARD
Document Type and Number:
Japanese Patent JPH04178267
Kind Code:
A
Abstract:

PURPOSE: To continuously form solder layers while successively allowing many sheets of circuit boards to travel by heating the circuit boards coated with a solder depositing compsn. to bring the solder depositing compsn. into reaction and selectively depositing Sn-Pb alloy solder on the pads of the circuit boards.

CONSTITUTION: The circuit boards are automatically determined in the positions relative to the line by an arraying conveyor 22 and enter a printing device 23. The pasty solder depositing compsn. contg. org. Pb and Sn powder is applied on the pad regions of the circuit boards by a screen printing method in this device. The circuit boards coated with the solder depositing compsn., then, enter a heating furnace 24 where the circuit boards are heated and the solder depositing compsn. induces a chemical reaction to deposit the Sn-Pb alloy solder selectively on the pads of the circuit boards. Further, the circuit boards emitted from the heating furnace 24 enter a washing device 26 by passing a transition 25 where the residues produced by the reaction of the solder depositing compsn. are washed way.


Inventors:
FUSE KENICHI
FUKUNAGA TAKAO
KONO MASANAO
IRIE HISAO
Application Number:
JP30407290A
Publication Date:
June 25, 1992
Filing Date:
November 13, 1990
Export Citation:
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Assignee:
FURUKAWA ELECTRIC CO LTD
HARIMA CHEMICALS INC
International Classes:
B23K1/00; B23K1/008; B23K3/06; H05K3/34; (IPC1-7): B23K1/00; B23K1/008; B23K3/06; H05K3/34
Attorney, Agent or Firm:
Hiroshi Wakabayashi