PURPOSE: To improve a line fault detection time by detecting a parity of a reception signal, applying 1/N frequency division to a parity noncoincident signal, comparing N sets of frequency division signal intervals for a prescribed time, and monitoring the line quality for each parity noncoincident signal.

CONSTITUTION: A reception processing unit 11 receives a demodulated digital multiplex signal 101 and outputs a parity noncoincident signal 102 and a clock signal 103 with a prescribed parity detection means. The signal 102 is given to a 1/N frequency divider circuit 12 and the signal 103 is given to N-sets of clock signal counter circuits 13. The circuit 12 receiving the signal 102 outputs N-sets of frequency division signals 104 and they are inputted to the N-sets of the circuits 13 as the control signals. The circuit 13 uses the signal 104 as the control signal to count a prescribed number of clock signals. N-sets of the count results 105 from the circuits 13 are ORed by an OR circuit 14, from which line changeover information 106 is outputted as line quality information. Furthermore, the results 105 are ANDed by an AND circuit 15, from which line switch-back information 107 is outputted as the line quality information.