PURPOSE: To speed up a logical arithmetic operation by carrying out a logic arithmetic between the data received via a data bus switch circuit and the data read out of a DRAM.
CONSTITUTION: When a logic arithmetic is carried out between the data on a memory 12 and the data on a DRAM 16, for example, a CPU 11 transmits the data on the memory 12 through a data bus switch circuit 14. Then the CPU 11 outputs the address of the data on the DRAM 16 to be computed and performs a read modified write operation, i.e., the read/write of data to the DRAM 16 in a single CPU cycle. Thus, it is possible to carry out an arithmetic between the data on the memories 12 and 13 except the CPU 11 and the data on the DRAM 16. Then a logic arithmetic operation can be speeded up.
TAMADA YASUTO
KAJIKAWA CHIKAYUKI
