PURPOSE: To improve utilization efficiency of MOST in unit cell by connecting source or drain of P, N channel MOST to form an output terminal, and subjecting connecting terminal between gates and one of remaining two terminals to form input terminals.

CONSTITUTION: Unit cell of a master slice system is constituted of n channel MOSTQ2 and P channel MOSTQ1. In case, a drain terminal P3 of MOSTQ1 is grounded and A terminal P1 that connects the gates of MOSTQ1, Q2 is at a high level, if a high level is applied to a drain terminal P4 of MOSTQ, output of a high level is obtained from a commonly connected terminal P2. Thus it becomes a logic integrated circuit.