Title:
LOGIC START SYSTEM OF DECODER FOR COMMON USE OF TRANSMISSION AND RECEPTION
Document Type and Number:
Japanese Patent JPS5429958
Kind Code:
A
Abstract:
PURPOSE: To prevent the superposition of converted analog signals by preventing the logic circuit in a decorder for the common use of transmission and reception from being initial-set during D/A conversion operation.
Inventors:
TSUDA TOSHITAKA
SOEJIMA TETSUO
KARIBE HIROHISA
OOHATA MICHINOBU
SOEJIMA TETSUO
KARIBE HIROHISA
OOHATA MICHINOBU
Application Number:
JP9635177A
Publication Date:
March 06, 1979
Filing Date:
August 11, 1977
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H03M1/02; (IPC1-7): H03K13/02