Title:
Low power standby shutdown circuit
Document Type and Number:
Japanese Patent JP6320924
Kind Code:
B2
Abstract:
A shut down circuit is disclosed that allows an electronic device such as a lamp driver to be turned-off with a small signal current. The shut down circuit requires only few components and allows a low-power consumption standby state since some or all of functionality of the electronic device can be turned off. In the one embodiment related to a lamp driver, wires of a 0-10V interface or Dali or other existing interface wires can be used so that no additional wires are needed. In addition, the shutdown circuit is galvanically isolated which allows connection to almost any external supply (low or high voltage, AC or DC).
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Inventors:
Clauberg, Bernd
Fan, yuhon
Lopez, Alejandro
Fan, yuhon
Lopez, Alejandro
Application Number:
JP2014537762A
Publication Date:
May 09, 2018
Filing Date:
October 16, 2012
Export Citation:
Assignee:
Philips Lighting Holding BV
International Classes:
H05B37/02
Domestic Patent References:
JP2011176911A | ||||
JP11102798A |
Foreign References:
US6769070 | ||||
US20100265743 | ||||
US20110140611 | ||||
US20100207539 | ||||
US20040140777 |
Attorney, Agent or Firm:
Patent Services Corporation m&s Partners