PURPOSE: To facilitate integration, by adjusting the electrostatic capacitance value of a junction based on a deep impurity level, adjusting a cut-off frequency based on an ambient temperature, thereby obtaining a solid state low-pass element, whose characteristics can be adjusted.

CONSTITUTION: S is highly doped in an n+-InP substrate having a face index (100) as a shallow level doner. An Mn doped p-InP layer 2 is grown as a deep level acceptor (hole capturing level) on the substrate. A p+-InGaAsP layer, in which Zn is highly doped, is grown as shallow level acceptor. Mesa etching is performed in order to specify the area of a p-n junction, which is formed by the n+-InP substrate 1 and the p-InP layer 2. Then, on the p+-InGaAsP layer 3, a p-side electrode comprising Au/Zn/Au is formed. On the back surface of the n+-InP substrate 1, an n-side electrode 5 comprising AuGe/Au is formed. In the diode having this structure, the shallow levels contribute to conduction, and the deep level contributes to the capture and discharge of the carriers.