To quickly create a mask layout, even when altering the exposure condition of an LSI pattern by substituting exposure conditions in its lithography process for the variables of an estimation formula for estimating its transistor- protruding dimension its gate-pattern dimension, the space between it and a pattern present in its periphery.
From a pattern 101 for forming an LSI circuit pattern, patterns 105 corresponding to transistor portions are extracted. Then, the pattern data of each pattern 105 and exposure conditions for its lithography are substituted for expression of an estimating function formula for estimating a transistor protruding dimension, by continuous function of the pattern data and lithography conditions affecting the transistor protruding dimension as its variables. As a result, since whether or not each transistor operates normally can be decided, the design pattern for make each transistor corresponding to its normal operation in desired exposure conditions can be obtained easily. Also, a mask layout capable of operating even under a wide range of exposure conditions can be created.
AIDA AKIHIKO
ODANAKA SHINJI
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