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Title:
MOSFET装置を制御するためのMOSFET装置
Document Type and Number:
Japanese Patent JP4988707
Kind Code:
B2
Abstract:
The arrangement has metal oxide semiconductor field effect transistors (MOSFETs) (Q1-Q6) on a chip that has connections (10, 12, 14) and serving as power and control cells. Source and gate connections of the MOSFETs are connected with each other and contact connections (10, 14), respectively. A drain connection of one power cell contacts the connection (12). Gate and drain connections of one control cell are connected with each other.

Inventors:
Antoine Chabot
Application Number:
JP2008508174A
Publication Date:
August 01, 2012
Filing Date:
February 24, 2006
Export Citation:
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Assignee:
ROBERT BOSCH GMBH
International Classes:
H01L29/78; H01L21/8234; H01L27/04; H01L27/088
Domestic Patent References:
JP62256475A
JP8037284A
JP2002542629A
JP2003243512A
JP2005072519A
Attorney, Agent or Firm:
Toshio Yano
Hiroyasu Ninomiya
Einzel Felix-Reinhard



 
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