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Title:
MACRO CELL IN SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH05136687
Kind Code:
A
Abstract:

PURPOSE: To obtain the macro cell in which another internal circuit cell and an external circuit connecting to an output terminal of the internal circuit cell are not affected by an external circuit connecting to one output terminal.

CONSTITUTION: An internal circuit cell 2 provided to a macro cell 1 in the semiconductor integrated circuit device is connected to another internal circuit cell 3 via a signal line L1. An output of the other internal circuit cell 3 is outputted to an external circuit. Moreover, the internal circuit cell 2 outputs the same output outputted to the other internal circuit cell 3 via a signal line L2 to an internal circuit cell 4 of a non-inverting output not required for logic design substantially whose logic is unchanged. The output of the internal circuit cell 4 of noninverting output is outputted to the external circuit.


Inventors:
ITO FUMIHIKO
ICHIKAWA HIROAKI
Application Number:
JP30080491A
Publication Date:
June 01, 1993
Filing Date:
November 15, 1991
Export Citation:
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Assignee:
FUJITSU LTD
FUJITSU VLSI LTD
International Classes:
H01L21/82; H01L21/822; H01L27/04; H03K19/173; (IPC1-7): H01L21/82; H01L27/04; H03K19/173
Attorney, Agent or Firm:
Hironobu Onda



 
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