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Title:
MANUFACTURE OF COMPLEMENTARY TYPE SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59150467
Kind Code:
A
Abstract:

PURPOSE: To form a well diffused layer of small substrate effect by reducing impurity concentration and thus contrive to increase the operating speed by ion- implanting an impurity through an oxidation resistant film in addition to an oxide film.

CONSTITUTION: An Si oxide film 22 is formed by thermally oxidizing the surface of an n type Si substrate 21, and then an Si nitride film pattern 23' covering an n type active region scheduled part and a p type one is formed. The substrate surface at the part for forming a field oxide film is exposed by forming an SiO2 film 25 and a resist pattern 26 and then etching them, boron is ion-implanted, and thermal oxidation treatment is performed, and accordingly a p-well 27 is formed. Boron concentration is low and diffusion depth is shallow in the p type active region scheduled part covered with said pattern 23', and a field oxide film forming scheduled part in the periphery is formed with a high boron concentration and a deep diffusion depth. Since said concentration in the active region is small, the substrate effect of an n-MOSFET formed in the p-well 27 can be reduced.


Inventors:
HOKEZU EIZOU
KONDOU TAKEO
ADACHI TAKAO
Application Number:
JP1853483A
Publication Date:
August 28, 1984
Filing Date:
February 07, 1983
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H01L21/8238; H01L27/092; H01L29/78; (IPC1-7): H01L27/08; H01L29/78
Attorney, Agent or Firm:
Takehiko Suzue



 
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