PURPOSE: To develop a method for manufacturing a Schottky gate field effect transistor of two-stage recess structure having excellent controllability of a drain current and a gate withstand voltage.
CONSTITUTION: A heat resistant gate electrode 3 is, for example, formed on an n-type GaAs operation layer 1, and further a sidewall 4 made of insulator is formed (b). Then, with the electrode 3 and the sidewall 4 as masks an n-type GaAs layer 5 is selectively formed (c). Thereafter, a sidewall 6 including the sidewall 4 is formed on the electrode 3, and an n+ type GaAs layer 7 is formed. Then, the sidewalls 4, 6 are removed, and an ohmic electrode 8 is formed on the layer 7. Thus, a drain current is decided according to a thickness of the operating layer, a distance between the gate and the recess of a cause for deciding a gate withstand voltage is decided according to a thickness of the sidewall, and excellent controllability is provided.
JPS63281473A | 1988-11-17 | |||
JPH05218098A | 1993-08-27 |