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Patent Searching and Data


Title:
MANUFACTURE OF HETERO-JUNCTION TRANSISTOR
Document Type and Number:
Japanese Patent JPS6179255
Kind Code:
A
Abstract:

PURPOSE: To form a collector electrode easily by a method wherein a semi-conductor film of a different kind is shaped between a collector layer and a connecting layer for the collector layer, only the collector layer and the connecting layer for the collector layer are etched selectively, only the collector layer is etched, the film of a different kind is etched and a collector connecting layer is formed.

CONSTITUTION: An N+ GaAs collector connecting layer 2, N-Ga0.7Al0.3As 3, an N-GaAs collector layer 4, a P+ GaAs base layer 5, an N-Ga0.7Al0.3As emitter layer 6, an N- Ga1-xAlxAs layer 7 while (x) is decreased gradually to 0 from 0.3, an N-GaAs base connecting layer 8 and an N+ GaAs emitter connecting layer 9 are superposed on semi-insulating GaAs. A mask is formed and the layer 9 is shaped through etching, and Mg id implanted and activated to form a P-external base 10. The layers 5∼10 are removed through etching up to its midway of the layer 5 by a mixed liquid of a tartaric acid aqueous solution and H2O0 water, an SiO2 film 11 is etched by CF4+H2 by using a resist mask 12, and the layer 5 is etched selectively by CCl2F2 and etching is stopped on the layer 3. An element is isolated through etching, and a predetermined electrode is attached. According to the method, a collector electrode can be formed easily to a hetero-junction transistor, and characteristic distribution in a wafer is improved.


Inventors:
HIRAOKA YOSHIKO
Application Number:
JP20060384A
Publication Date:
April 22, 1986
Filing Date:
September 27, 1984
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L29/205; H01L21/331; H01L29/73; H01L29/737; (IPC1-7): H01L29/20; H01L29/72
Attorney, Agent or Firm:
Noriyuki Noriyuki