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Title:
MANUFACTURE OF SCHOTTKY GATE TYPE FIELD-EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS6034073
Kind Code:
A
Abstract:

PURPOSE: To increase mutual conductance and reverse dielectric resistance by forming a layer, resistivity thereof is higher than a channel region and thickness thereof is brought to a depletion state by the diffusion potential of a gate metal, between the channel region and a gate electrode.

CONSTITUTION: A source region 12 and a drain region 13 are formed to a semi- insulating GaAs substrate 11. Si3N4 is deposited on the surface as an insulating film 19, and a window hole section is formed to the film 19 in a gate region section, the exposed section of a channel region is etched, and a high resistivity layer 20 is grown on the etched section. With the layer 20, the thickness is all brought to a depletion state by the diffusion potential of a gate metal, and it has resistivity higher than the channel region. Al is evaporated, and the gate metal 15 is formed through a lift-off method. Accordingly, a Schottky gate type FET having large mutual conductance and large gate reverse dielectric resistance can be manufactured.


Inventors:
UENOYAMA TAKESHI
Application Number:
JP14323283A
Publication Date:
February 21, 1985
Filing Date:
August 04, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/338; H01L29/80; H01L29/812; (IPC1-7): H01L29/80
Attorney, Agent or Firm:
Toshio Nakao



 
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