Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2808996
Kind Code:
B2
Abstract:
PURPOSE: To execute an accurate hysteresis investigation in reference to a map by a method wherein position data written in the map are corrected so as to agree with position information indicated on chips.
CONSTITUTION: The center value a1/2 of the coordinate of a chip region 2A which belongs to a row closest to an axis (u), i.e., a row whose coordinate value (b) is smallest, and the center value b1/2 of the coordinate of the chip region 2A which belongs to a column closest to an axis (v), i.e., a column whose coordinate value (a) is smallest, are obtained. A point having coordinates (a1/2, b1/2) which are determined by the obtained center values is the original point of a coordinate system which is a reference for the allotment of chip regions 2 in an exposure process and, therefore, agree approximately with the actual center of a wafer 1. Then the coordinates (a, b) of all the chip regions 2A on a map are converted so as to transform the coordinates (a1/2, b1/2) of the specific chip region 2A into the coordinates (0, 0). The transformed coordinates of the respective chip regions 2A on the map agree with chip codes which are given to the actual chip regions 2 in the exposure process.
Inventors:
IIJIMA NOBUO
Application Number:
JP19828692A
Publication Date:
October 08, 1998
Filing Date:
July 24, 1992
Export Citation:
Assignee:
FUJITSU KK
International Classes:
H01L21/00; H01L21/02; H01L21/66; H01L21/68; H01L23/544; G01R31/28; (IPC1-7): H01L21/02; G01R31/28; H01L21/66; H01L21/68
Attorney, Agent or Firm:
Teiichi