Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3043493
Kind Code:
B2
Abstract:
PURPOSE: To form a stable anti-fusing layer having good flatness on a lower diffusion preventing film to stabilize element characteristic by forming a pillar consisting of an upper diffusion preventing film and anti-fusing layer on a lower layer wiring after sequentially forming thereon a lower diffusion preventing film, an anti-fusing layer and an upper diffusing preventing film.
CONSTITUTION: A lower diffusing preventing film 2, an anti-fusing layer 3 and an upper diffusing preventing film 4 are sequentially formed on a lower wiring 1 and the lower diffusing preventing film 2 is exposed by etching the upper diffusing preventing film 4 and anti-fusing layer 3. A pillar consisting of the upper diffusing preventing film 4 and anti-fusing layer 3 is formed and thereafter a layer insulating film 5 having apertures 6, 7 is formed. An upper wiring 8 is formed in such a manner as assuring contact with the upper diffusion preventing film 4 and lower diffusion preventing film 2 within the apertures 6, 7. Thereby, an anti-fuse layer 3 can be grown under the condition that an oxide film is not formed at the surface of the lower diffusing preventing film 2.
Inventors:
Shigetaka Uji
Application Number:
JP29883691A
Publication Date:
May 22, 2000
Filing Date:
November 14, 1991
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/82; H01L21/822; H01L27/04; (IPC1-7): H01L21/82; H01L21/822; H01L27/04
Domestic Patent References:
| JP3179763A |
Attorney, Agent or Firm:
Gunichiro Ariga