Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3148183
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method for enabling formation of multilayer interlayer insulating film, having a low specific inductive capacity and a stable film quality when the interlayer insulating film is formed in a semiconductor device.
SOLUTION: This method of manufacturing a semiconductor device has a process of forming an SiN film by a high-density plasma CVD method, using inorganic Si gas not containing H and N2. More specifically, the method has a process of forming an F-containing interlayer insulating film 6, and a process of forming the SiN film 5 on either of the lower base and the upper base of the film 6 or both of the lower and upper bases of the film 6, by the high- density plasma CVD method using the inorganic Si gas which does not contain H and H2. Each of the processes is determined to be performed at the same film-forming chamber.
Inventors:
Ooto Hikariichi
Tatsuya Usami
Koji Kishimoto
Kenichi Koyanagi
Tatsuya Usami
Koji Kishimoto
Kenichi Koyanagi
Application Number:
JP24523598A
Publication Date:
March 19, 2001
Filing Date:
August 31, 1998
Export Citation:
Assignee:
NEC
International Classes:
H01L21/318; H01L21/768; H01L23/522; (IPC1-7): H01L21/318
Domestic Patent References:
| JP529301A | ||||
| JP8227888A | ||||
| JP57152132A | ||||
| JP917860A | ||||
| JP9237783A |
Attorney, Agent or Firm:
Kiyoshi Inagaki