MANUFACTURE OF SEMICONDUCTOR DEVICE

Japanese Patent JPH0334547

A

PURPOSE: To attain an improved electrical connection for a device region by performing the exposure and development of a material having flow behavior and forming an opening, forming a conductive pillar in the opening, providing a layer made of an insulating material for covering the conductive pillar and the main surface, corroding the layer made of the insulating material and exposing the top surface of the conductive pillar. CONSTITUTION: A material with flow behavior is deposited as a photoresist layer 13, exposure and development are performed and an opening 14 is formed, and a conductive material is subjected to plating treatment in the opening 14, thus forming a conductive pillar 15. After the conductive pillar 15 has been formed, a photoresist layer 13 is eliminated, insulating material layers 16 and 17 for depositing the conductive pillar 15 and one main surface 12 are provided, the insulating material layers 16 and 17 are subjected to corrosion treatment, and a top surface 15a of the conductive pillar 15 is exposed. The opening 14 can be formed without extremely, adversely affecting device regions 3 and 4 and insulating regions 9, 19a, and 19b at the lower side by this method. Even if the lower material is laminated while the opening 14 is being formed, the amount eliminated is extremely small, thus the contact hole 14 onto an adjacent separation oxide or field oxide is partially overlapped, without the risk of short-circuiting.

REENDERUTO DE BURUIN
ROBERUTASU DOMINIKASU YOSEFU F
YOSEFUSU MARUCHINUSU FURANSHIS

JP16581890A

February 14, 1991

June 26, 1990

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PHILIPS NV

H01L21/60; H01L21/768; H01L23/522; H01L21/3205; (IPC1-7): H01L21/3205; H01L21/90

JPS63107043A	1988-05-12
JPS60153149A	1985-08-12
JPS502059A	1975-01-10

Akihide Sugimura (5 outside)

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