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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH04113618
Kind Code:
A
Abstract:

PURPOSE: To improve the contact of an electrode and to easily form a fine interconnection pattern at a very LSI semiconductor device by a method wherein, after a contact hole in a fine diameter has been formed, it is left as it is or a connecting metal layer is filled down to a halfway part, a taper is formed at the upper edge of the contact hole by sputtering ions or the like and an interconnection layer is formed.

CONSTITUTION: A first SiO2 film 12 is formed on an Si substrate 11 by a thermal oxidation method; a first contact hole 13 is opened. A first titanium (Ti) film 14 is applied to the substrate 11 by a PVD method. The Ti film 14 is changed to a titanium silicide film 15; the Ti film 14 on the SiO film 12 is etched and removed. A second SiO2 film 16 is deposited by a CVD method; a second contact hole 17 is opened. A W film 18 is grown selectively inside the contact hole by using tungsten hexafluoride (WF6) and silane (SiH4) gas by a CVD method; the contact hole is filled. The SiO2 film 16 is subjected to sputtering by ions using Ar and the upper line of the contact hole 17 is spread. The whole surface of the substrate 11 is covered with a second Ti film 20 by a sputtering method. An Al interconnection film 21 as an interconnection metal is applied by a sputtering method; it is patterned together with the second Ti film 20; an interconnection metal layer is formed.


Inventors:
OBA TAKAYUKI
Application Number:
JP23390890A
Publication Date:
April 15, 1992
Filing Date:
September 03, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/3205; H01L21/28; H01L23/52; (IPC1-7): H01L21/28; H01L21/3205
Attorney, Agent or Firm:
Sadaichi Igita



 
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