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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0458535
Kind Code:
A
Abstract:

PURPOSE: To prevent the performance of a device from being deteriorated and to prevent a production yield from being lowered by a method wherein polycrystalline silicon is filled into a groove, a polycrystalline silicon layer is deposited at the same time and they are isolated by a surface-polishing operation.

CONSTITUTION: An isolation insulating layer 2 and an oxidation-resistant mask layer 3 are formed on a semiconductor substrate 1; after that, an etching and removal operation is executed; and grooves 10 are formed. Then, the substrate 1 is oxidized thermally; an insulating layer 5 is formed on inner sidewalls of the grooves 10; a resist layer 22 is formed on the surface of the substrate 1; the mask layer 3 and an oxide film 20 are removed selectively; after that, the resist layer 22 is removed; and polycrystalline silicon 8 is deposited. Then, its surface is surface-polished; and a polycrystalline silicon layer 62 is formed. An insulating layer 14 and a polycrystalline silicon layer 8 are deposited sequentially on the whole surface of the substrate 1; and after that, an oxidation-resistant mask layer 12 is formed. In addition, the silicon layer 8 exposed from the mask layer 12 is oxidized selectively; an insulating layer 9 is formed; and an isolated external base extraction electrode 81 which is composed of the silicon layer 8 is formed.


Inventors:
HAGA NARIHIRO
Application Number:
JP17101090A
Publication Date:
February 25, 1992
Filing Date:
June 27, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/73; H01L21/331; H01L21/76; (IPC1-7): H01L21/331; H01L21/76; H01L29/73
Attorney, Agent or Firm:
Sadaichi Igita