Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS58130543
Kind Code:
A
Abstract:
PURPOSE:To provide an N type inversion layer in the neighborhood of the substrate surface and a P type diffused layer thereunder, by implanting Ga ions into a fixed part of the N type Si substrate resulting in diffusion. CONSTITUTION:An Si3N4 mask 9 is applied on the N type Si substrate 8, thus the implantation layer 12 for Ga ions 11 is formed, and then Ga is diffused from the layer 12 into the substrate 8 at 1,150 deg.C in dry N2 resulting in the formation of the N type inversion layer 13 in the neighborhood of the surface of the substrate 8 and the P type layer 14 thereunder. The inversion layer 13 is generated by the spread of Ga from the Si substrate surface in the diffusion process and the crystal defect due to the implantation, and has different characteristics according to implantation and diffusion conditions of the N type inversion layer. For example, if the amount of Ga implantation is much, the N type carrier in the layer 13 is much; if the diffusion time increases, the inversion layer exsists further deeper. By this constitution, the density and the depth are easily controlled with good accuracy, and thus a P layer can be buried. Since a buried resistance layer and an electrode region can be formed by a simultaneous diffusion, and there is an N type inversion layer on the resistance layer, they have advantage such as not under influence of contaminated ions from the outside.
Inventors:
OOYU SHIZUNORI
KASHIYUU NOBUYOSHI
TAMURA MASAO
KASHIYUU NOBUYOSHI
TAMURA MASAO
Application Number:
JP1165382A
Publication Date:
August 04, 1983
Filing Date:
January 29, 1982
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/265; H01L21/74; H01L21/822; H01L27/04; (IPC1-7): H01L21/265; H01L27/04
Attorney, Agent or Firm:
Toshiyuki Usuda