Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59200421
Kind Code:
A
Abstract:
PURPOSE:To reduce the extent of an element isolation region, to miniaturize a stepped difference and to flatten the surface of a substrate by forming an oxide film to the wall side and bottom of a groove, shaping a polycrystalline silicon layer in the groove on the oxide film, forming an oxide film to the surface of the polycrystalline silicon layer and manufacturing the element isolation region. CONSTITUTION:A single crystal silicon substrate 11 is etched while using a thermal oxide film 12 and a photo-resist pattern as etching mask patterns. A photo- resist of the photo-resist pattern 13 is thermally deformed through etching by using a parallel plate type dry etching device at that time, flows out to a side wall, and functions as a mask. Consequently, a tapered groove 14 is formed by promoting etching while coating the side wall. Ions are implanted. The photoresist pattern 13 and the thermal oxide film 12 function as masks at that time. Accordingly, an implantation layer 15 is formed through ion implantation. The photo-resist pattern 13 is removed, and a thermal oxide film 16 is shaped to the bottom and side wall of the groove 14 through thermal oxidation by using a mixed gas of hydrogen gas and oxygen gas.
Inventors:
HORIO TAKUJI
Application Number:
JP7396383A
Publication Date:
November 13, 1984
Filing Date:
April 28, 1983
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L21/302; H01L21/3065; H01L21/762; (IPC1-7): H01L21/302
Attorney, Agent or Firm:
Hiroshi Kikuchi
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