Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS60142543
Kind Code:
A
Abstract:
PURPOSE:To reduce the degree of recesses and protrusions on the surface of a PSG layer by a method wherein the depth of the contact hole on the PSG layer is made shallower while making the best use of the prevention of generation of unsatisfactory step coverage on a wiring at the edge of a through hole due to the softening by heat of the PSG layer. CONSTITUTION:An SiO2 insulating film 2 is formed on a semiconductor substrate 1. An electrode window is provided, a polycrystalline silicon conductive layer is formed, and the conductive layer 3A on the upper part of the electrode window is left by performing a selective etching. A PSG layer 5 is formed, and a recessed part 8 is formed by performing a selective etching on the upper part of the conductive layer 3A. The PSG layer 5 is softened and liquefied by heating, and the edge of the recessed part 8 is rounded. The entire PSG layer 5 is reduced in thickness by performing an etching, ane the upper surface of the conductive layer 3A is exposed. The edge of a through hole 10 is rounded, the depth of the through hole is smaller than the thickness of the PSG layer on the insulating film 2, and the degree of roughness at the PSG surface level is made smaller. The defect such as unsatisfactory step coverage and the like generating on the wiring conductive layer to be formed on the PSG layer can be prevented.
Inventors:
OOHASHI SHIYUUICHI
Application Number:
JP24769683A
Publication Date:
July 27, 1985
Filing Date:
December 29, 1983
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/28; (IPC1-7): H01L21/28
Attorney, Agent or Firm:
Aoki Akira