Title:
MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH05304267
Kind Code:
A
Abstract:
PURPOSE: To provide a manufacturing method of a semiconductor integrated circuit device having a stacked capacitor having a large capacity value and a small variation in a capacity value.
CONSTITUTION: A second polycrystalline silicon film 24 is continuously formed on the upper surface and on the side of a first polycrystalline silicon film pattern 23 divided into a plurality of patterns and ranging over the surface of an interlayer isolation layer 2 exposed inside a split groove 28 in order to make the first and second polycrystalline silicon films 23, 24 the lower part electrodes of a MOS type stack capacitor.
Inventors:
NAGAYASU KATSUYUKI
Application Number:
JP10716692A
Publication Date:
November 16, 1993
Filing Date:
April 27, 1992
Export Citation:
Assignee:
NEC YAMAGUCHI LTD
International Classes:
H01L27/04; H01L21/822; H01L21/8242; H01L27/10; H01L27/108; (IPC1-7): H01L27/108; H01L27/04
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)