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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS61220466
Kind Code:
A
Abstract:

PURPOSE: To reduce the area and the resistance of a base and to make the speed of a bipolar transistor high, by forming a protruded emitter region, whose side surface is covered with an insulating film, and taking out a base electrode comprising a metallic thin film having a small resistance value from a base region beneath said emitter region.

CONSTITUTION: An N+ type embedded region 13 is diffused and formed in the surface layer part of a P-type Si substrate 12, which is to become a collector. An N-type collector layer 15, whose area is slightly smaller than the region 13, is epitaxially grown. The outside of the layer 15 is surrounded by an insulating and isolating layer 14, which is arranged on the substrate 12. Then a P-type base layer 16 is provided on the layer 15 so that the peripheral part of the layer 16 is deep and the inner part thereof is shallow. An N+ type emitter 19 is formed on the inner surface part. A protruded N+ type emitter layer 17 comprising polycrystalline Si is formed on the layer 19. Thereafter, a base taking out electrode 22 comprising an organic thin film is attached to the deep part of the layer 16. The electrode 22 is taken out and extended on an isolating layer 14. The entire surface is covered with an insulating layer 24. Windows are formed, and a base electrode 25 and an emitter electrode 28 are deposited.


Inventors:
FUJITA TSUTOMU
Application Number:
JP6252185A
Publication Date:
September 30, 1986
Filing Date:
March 27, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L29/73; H01L21/331; H01L29/72; H01L29/732; (IPC1-7): H01L29/72
Attorney, Agent or Firm:
Akira Kobiji (2 outside)