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Title:
MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS62141739
Kind Code:
A
Abstract:

PURPOSE: To eliminate disconnection and to improve reliability in the resistance to electromigration or the like by a method wherein, after a contact or a via hole is formed, a thin semiconductor or metal film is formed on the side surface thereof, and a gas containing metal is made to react to bury the contact or the via hole with the metal selectively and completely.

CONSTITUTION: A contact hole (via hole) 4 is formed in an interlayer insulating film 3 and a polycrystalline silicon semiconductor thin films is formed on the whole surface by a CVD method. Next, the polycrystalline silicon semiconductor thin film 5 on the bottom surface of the contact hole (via hole) 4 and on the interlayer insulating film 3 is removed by using anisotropic dry etching. Since the etching goes only in the vertical direction, the polycrystalline silicon semiconductor thin film 5 is left on the side surface of the contact hole (via hole) 4. Then, a gas prepared by diluting WF6 with Ar is made to react with the polycrystalline silicon 5. In other words, tungsten W is made to grow selectively only on the side surface of the contact hole (via hole) 4 b using the reducing reaction of silicon. Since hydrogen has a property that it is adsorbed only on the surface of metal to ionize the same, the reducing reaction of hydrogen grows only from the side surface (where W is present) and the bottom surface (where Al is present) of the contact hole (via hole) 4, and does not grow on the insulating film 3.


Inventors:
FUJITA TSUTOMU
YAMAMOTO HIROSHI
TANIMURA SHOICHI
KAKIUCHI TAKAO
Application Number:
JP28330985A
Publication Date:
June 25, 1987
Filing Date:
December 16, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/3205; (IPC1-7): H01L21/88
Attorney, Agent or Firm:
Toshio Nakao



 
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