Title:
MANUFACTURE OF SEMICONDUCTOR NONVOLATILE MEMORY DEVICE
Document Type and Number:
Japanese Patent JP3021133
Kind Code:
B2
Abstract:
PURPOSE: To improve integration degree of a semiconductor memory device by forming an LSI circuit of one transistor/one cell structure in a semiconductor nonvolatile memory device wherein a switching element is used.
CONSTITUTION: Data lines 48, 50 are wired to a drain of each of switching elements 3A, 3B, 3C, 3D, respectively through lateral lines 48A, 48B and 50C, 50D diverging from main lines 48H and 50H. Source lines 44, 46 are wired to a p-type diffusion layer formed inside a source of each of switching elements 3A, 3B, 3C, 3D through lateral lines 44A, 44C and 46B, 46D diverging from main lines 44, 46. This state means that each switching element 3 is wired through a rectifier 27 by lateral lines 44A, 44C and 46B, 46d. The rectifier 27 is a p-n junction by a p-type diffusion layer provided inside an n-source layer of the switching element 3. Wood lines 52, 54 are wired to a control electrode 24 of each switching element 3.
Inventors:
Takashi Nakamura
Application Number:
JP28666791A
Publication Date:
March 15, 2000
Filing Date:
October 31, 1991
Export Citation:
Assignee:
ROHM Co., Ltd.
International Classes:
H01L21/8247; G11C11/22; H01L21/8246; H01L27/10; H01L27/105; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; G11C11/22; H01L27/10; H01L29/788; H01L29/792
Domestic Patent References:
| JP5730373A | ||||
| JP3228372A | ||||
| JP60113474A |
Attorney, Agent or Firm:
Hideo Furuya