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Title:
MANUFACTURE OF SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JP3295108
Kind Code:
B2
Abstract:

PURPOSE: To provide the manufacturing method, of a semiconductor device, wherein the resistance of a contact metal layer is made low, the high speed of an element can be realized, the coverage of a barrier metal layer inside a contact hole can be made good and the surface of an interconnection layer on the barrier metal layer can be flattened.
CONSTITUTION: The title manufacture is provided with the following: a process wherein an insulating film 4 having an opening part 3 is formed on a silicon substrate 1; and a process wherein the silicon substrate 1 is heated, a metal source gas is introduced into a chamber and a contact metal layer 5 composed of a metal silicide is formed on the barrier substrate 1 inside the opening part 3 by means of a chemical vapor growth method. In addition, the title manufacture is constituted so as to include the following: a process wherein a barrier- metal source gas is introduced into the chamber, a barrier metal is deposited so as to cover the contact metal layer 5 by means of a chemical vapor growth method and a barrier metal layer 6 is formed; and a process to form an interconnection layer 7 so as to cover the barrier metal layer 6.


Inventors:
Toshiya Suzuki
Takayuki Ohba
Application Number:
JP22990791A
Publication Date:
June 24, 2002
Filing Date:
September 10, 1991
Export Citation:
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Assignee:
富士通株式会社
International Classes:
H01L21/28; H01L21/285; H01L21/3205; (IPC1-7): H01L21/28; H01L21/285; H01L21/3205
Domestic Patent References:
JP63229814A
JP283978A
JP3286527A
Attorney, Agent or Firm:
Gunichiro Ariga