Title:
MANUFACTURE OF SEMICONDUCTOR
Document Type and Number:
Japanese Patent JPS59154505
Kind Code:
A
Abstract:
PURPOSE:To obtain a target threshold voltage without any variance by absorbing variation in the thickness of an oxidized film by an upper hierarchy and variations in polysilicon film thickness, sheet resistance after phosphor treatment, and resist size by a lower hierarchy. CONSTITUTION:An etching manufacture device 1 performs feedback control under proportional plus integral plus derivative PID control by a controller 2. Further, an overetching time calculating device 3 is supplied with inspection data from a polysilicon film thickness inspecting device 6, sheet resistance inspecting device 7, resist size inspecting device 8, and channel length inspecting device 9 respectively. When a threshold voltage 110 to be set is supplied, a channel calculating device 4 as the upper hierarchy calculates target channel length and the device 3 as the lower hierarchy calculates the overetching time of the target channel length 43. The calculated overethcing time 11 is supplied to a PID controller 2 to control the device 1 on the basis of the data 12 on the overetching time.
Inventors:
MATSUBA IKUO
MATSUMOTO KUNIAKI
MATSUMOTO KUNIAKI
Application Number:
JP2756383A
Publication Date:
September 03, 1984
Filing Date:
February 23, 1983
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G05B17/00; H01L21/302; H01L21/3065; (IPC1-7): G05B17/02
Attorney, Agent or Firm:
Akio Takahashi