Title:
MANUFACTURE OF TRANSISTOR
Document Type and Number:
Japanese Patent JPH04233737
Kind Code:
A
Abstract:
PURPOSE: To provide an element having uniformly improved characteristics, by improving the boundary face treatment in the PET fabrication process. CONSTITUTION: The fabrication process includes a step of providing an emitter window at a dielectric layer (usually SiO2 ) 19 and depositing at least an atom species on such an exposed surface or in a single crystal 11 beneath the exposed surface. Then, in the same way as in the prior art, the polysilicon depositing, dopant implanting, and 'drive-in' follow. In a preferred embodiment, a novel depositing step includes a low density and low energy As implanting (5×10<13> -2×10<15> atoms/cm<2> , 0.1-5keV). The novel method greatly improves the characteristics of the element and e.g. hFE is twice as high as that of a similar PT in the prior art.
Inventors:
JIYON KONDON BIIN
GURETSUGU ESU HIGASHI
BAARAMU JIYARARIIFUARAANI
KURITSUFUOODO EI KINGU
GURETSUGU ESU HIGASHI
BAARAMU JIYARARIIFUARAANI
KURITSUFUOODO EI KINGU
Application Number:
JP22632891A
Publication Date:
August 21, 1992
Filing Date:
August 13, 1991
Export Citation:
Assignee:
AMERICAN TELEPHONE & TELEGRAPH
International Classes:
H01L29/73; H01L21/225; H01L21/331; H01L29/732; (IPC1-7): H01L21/331; H01L29/73
Domestic Patent References:
| JPS5010575A | 1975-02-03 |
Attorney, Agent or Firm:
Hirofumi Mimata