Title:
導電性薄膜パターン基板の製造方法及び導電性薄膜パターン基板並びに表示素子
Document Type and Number:
Japanese Patent JP4652548
Kind Code:
B2
Abstract:
A method for manufacturing a conductive thin film patterned substrate which is capable of being practiced at a reduced cost without causing environmental pollution while eliminating any troublesome after-treatment. An insulating substrate made of glass or the like is formed thereon with an InSnO, SnSbO, ZnAlO or Al thin film. Then, a phosphate low-softening glass paste layer is formed on the thin film. A portion of the thin film contiguous to an insulating layer made of the low-softening glass paste melts into a glass region to form an insulating layer region, so that a conductive thin film region may be patterned as electrodes.
Inventors:
Tatsuo Yamaura
Shigeo Ito
Shigeo Ito
Application Number:
JP2000306035A
Publication Date:
March 16, 2011
Filing Date:
October 05, 2000
Export Citation:
Assignee:
Futaba Electronics Co., Ltd.
International Classes:
C03C17/34; H01B5/14; H01B13/00; H01J9/02; H01J9/227; H01J29/04; H01J31/12; H01J31/15; H01L29/786; H01L31/18; H05K3/02
Domestic Patent References:
| JP11224531A |