Title:
電子デバイスの製造方法および該方法により製造された電子デバイス
Document Type and Number:
Japanese Patent JP5693610
Kind Code:
B2
Abstract:
The invention relates to an electronic component having a GaAs semiconductor substrate (HS), semiconductor components (BE) being implemented on the front side thereof, and the back side thereof having a multilayer backside metallization (RM), wherein an advantageous construction of the layer sequence of the backside metallization is proposed, the backside metallization in particular comprising an Au layer as a bonding layer.
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Inventors:
Gunter Yongseon
Hairman steecrower
Hairman steecrower
Application Number:
JP2012545291A
Publication Date:
April 01, 2015
Filing Date:
December 21, 2010
Export Citation:
Assignee:
United Monolithic Semiconductors GmbH
International Classes:
H01L21/3205; H01L21/768; H01L23/522
Domestic Patent References:
| JP2004088062A | ||||
| JP2006114732A | ||||
| JP2002083936A | ||||
| JP8203924A | ||||
| JP3153030A | ||||
| JP6021058A | ||||
| JP2009514228A | ||||
| JP5167062A | ||||
| JP3016176A |
Foreign References:
| WO2009016928A1 |
Attorney, Agent or Firm:
Einzel Felix-Reinhard
Takuya Kuno
Takuya Kuno