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Title:
MANUFACTURING METHOD FOR LAMINATED CERAMIC ELECTRONIC COMPONENT
Document Type and Number:
Japanese Patent JP3954792
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a method for the manufacture of a laminated ceramic electronic component which can reduce rejection rate due to the short circuit or the like of an internal electrode, even if a dielectric layer is made progressively thin and multilayer and which has superior workability and handleability, when it is mounted on various boards or the like.
SOLUTION: The manufacturing method is provided with a first lamination process, where a first-face-side sheet block (2a) containing at least one dielectric green sheet layer is laminated on the first face (102a) of a reference sheet block (10a), containing at least one dielectric green sheet layer and the first-face-side sheet block is contact- bonded to the reference sheet block by applying pressure; a second lamination process, where a second-face-side sheet block (2b) containing at least one dielectric green sheet layer is laminated on the second face (102b) on the opposite side of the first face of the reference sheet block to which the first-face-side sheet block is contact- bonded and the second-face-side sheet block is contact-bonded to the reference sheet block by applying a pressure; and a process, where pressure is applied to an unfired laminated raw body obtained, by alternately performing the first lamination process and the second lamination process.


Inventors:
Nakano Yukie
Takeshi Nomura
Application Number:
JP2000336347A
Publication Date:
August 08, 2007
Filing Date:
November 02, 2000
Export Citation:
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Assignee:
tdk Corporation
International Classes:
H01G4/12; H01G4/30; (IPC1-7): H01G4/12; H01G4/30
Domestic Patent References:
JP6342736A
JP8316092A
JP2000244130A
JP7171818A
JP10172864A
JP11111560A
JP11260661A
Attorney, Agent or Firm:
Hitoshi Maeda