Title:
MANUFACTURING METHOD OF SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JP2012109346
Kind Code:
A
Abstract:
To provide a manufacturing method of a semiconductor substrate capable of suppressing disconnection of a wire and decrease in processing speed.
A manufacturing method of a semiconductor substrate for cutting an ingot 1 using a single row or a plurality of rows of a wire W to which an abrasive grain is firmly fixed comprises a step of preparing the ingot 1 and a step of cutting the ingot 1 while rotating the wire in a direction y crossing an extension direction of the wire W. In the step of cutting the ingot 1, the wire W preferably reciprocates.
Inventors:
TANIZAKI KEISUKE
YAMAMOTO YOSHIYUKI
SATO KAZUNARI
ARAKAWA SATOSHI
YAMAMOTO YOSHIYUKI
SATO KAZUNARI
ARAKAWA SATOSHI
Application Number:
JP2010255918A
Publication Date:
June 07, 2012
Filing Date:
November 16, 2010
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
H01L21/304; B24B27/06; B28D5/04
Attorney, Agent or Firm:
Fukami patent office
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