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Title:
MANUFACTURING METHOD OF WIRING BOARD, AND THE WIRING BOARD
Document Type and Number:
Japanese Patent JP2009117498
Kind Code:
A
Abstract:

To prepare a wiring board and an electronic circuit having a proper fine wire pattern and a proper narrow gap between the patterns that use a coating material, and to lower the cost of an organic thin-film electronic device and the electronic circuit, since they become realizable through a development of a printing technique.

The wiring board with a field effect transistor comprises a plurality of trenches arranged in parallel; a common trench communicating the plurality of trenches at one of their ends; a metal layer formed at the bottom of the plurality of trenches; and an electrode layer, connected with the metal layer and formed at the bottom of the common trench, and the electrode layer provided in the common trench constitutes a source electrode or a drain electrode.


Inventors:
NAKAZATO NORIO
FUJIEDA NOBUO
ISHIBASHI MASAYOSHI
KATO MIDORI
ARAI TADASHI
SHIBA TAKEO
Application Number:
JP2007286865A
Publication Date:
May 28, 2009
Filing Date:
November 05, 2007
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H05K3/10; H01L23/14
Domestic Patent References:
JP2005353772A2005-12-22
JP2004260364A2004-09-16
JPH02275672A1990-11-09
Attorney, Agent or Firm:
Manabu Inoue
Yuji Toda



 
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