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Patent Searching and Data


Title:
MATCHED FILTER AND CORRLATOR
Document Type and Number:
Japanese Patent JPH11274979
Kind Code:
A
Abstract:

To decrease the number of multipliers down only to the number of types of elements and to reduce the circuit scale by adding together the reception samples for each element of a diffusion code, multiplying the signals to be added and synthesized together by the count corresponding to the code elements and adding and synthesizing together the synthesized signals for each multiplied element.

Receiving signals r(n) are inputted to a shift register 31 of a matched filter. The reception samples corresponding to a code element '1' are synthesized through an adder/synthesizer 32. Meanwhile, the reception samples corresponding to a code element '0' are synthesized by an adder/ synthesizer 33. The multipliers 34 and 35 multiply the synthesized value of both types of reception samples by the count corresponding to the code element (counts '1' and '-1' with respect to elements '1' and '0' respectively). The signals, which are outputted from both multipliers 34 and 35, are synthesized by an adder 36 and the result of inverse diffusion is obtained. Meanwhile, every tap count weighting device corresponds to each diffusion code, and these weighting signals are synthesized by an adder/synthesizer and then outputted.


Inventors:
MUKAI MANABU
NOUJIN KATSUYA
KUMAKI YOSHINARI
MITSUKI ATSUSHI
Application Number:
JP7282698A
Publication Date:
October 08, 1999
Filing Date:
March 20, 1998
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H03H17/02; H04B1/707; H04B1/7093; (IPC1-7): H04B1/707; H03H17/02
Attorney, Agent or Firm:
Suyama Saichi